Publication:
Design of a 2.45 GHz RF-CMOS power splitter circuit for ISM RFID readers

dc.contributor.affiliation#PLACEHOLDER_PARENT_METADATA_VALUE#en_US
dc.contributor.authorUddin, Md. Jasimen_US
dc.date.accessioned2024-10-08T03:21:09Z
dc.date.available2024-10-08T03:21:09Z
dc.date.issued2010
dc.description.abstractThe recent demand for automatic radio frequency identification (RFID) tags, has triggered research for accompanying miniature, low-power reader circuits. Implementation of such circuits using conventional integrated fabrication techniques such as RF complementary metal-oxide-semiconductor (CMOS) is desirable due to the low cost, reduction in parasitics and small-size. This research illustrates the design of a RF-CMOS power splitter for an RFID reader circuit to serve the ISM 2.45 GHz band. The power splitter design is based on a Wilkinson power splitter and utilizes spiral inductors, metal finger capacitors and high sheet poly resistors. The design utilizes the 0.18 2m Silterra RF-CMOS technology. Low return loss of 6.9 dB, low insertion loss 3 dB and high isolation 10dB were obtained from pre-layout simulations. The low insertion loss 1.496 dB was found from post-layout simulation. The overall power splitter circuit is simulated using AWR Microwave Office®, indicating its S-parameters. The individual inductors were designed using Sonnet® to obtain the appropriate inductance at 2.45 GHz. Further refinement of the inductor layout design was done using CST® to incorporate the effect of composite CMOS layers. Simulation results indicate that inductors core diameters must be adequately large (more than 100 2m) to ensure high quality factor characteristics and its conductor spacing should be minimal to obtain larger per unit area inductive value. Capacitor and resistor layout and extraction were performed using Cadence®. It shows the desired capacitance value of 1.39 pF required 101 fingers and the 2.2 pF required 105 fingers respectively. The high sheet poly resistor is used to implement the 300 Ohms resistor. The h-poly resistor had dimensions of 5.08 2m × 7.96 2m. Layout versus schematic simulations were performed using Cadence®. The floor plan for the power splitter was designed to fit two 1800 2m × 1800 2m chips. The post layout simulation results indicated satisfactory results which matched all the design requirements.en_US
dc.description.callnumbert TK 7871.99 M44 U18D 2010en_US
dc.description.degreelevelMaster
dc.description.identifierThesis : Design of a 2.45 GHz RF-CMOS power splitter circuit for ISM RFID readers /by Md. Jasim Uddinen_US
dc.description.identityt00011160595MdJasimUddinTK7871.99M44U18D2010en_US
dc.description.kulliyahKulliyyah of Engineeringen_US
dc.description.notesThesis (MSCIE) -- International Islamic University Malaysia, 2010en_US
dc.description.physicaldescriptionxvii, 103 leaves : ill. ; 30 cmen_US
dc.description.programmeMaster of Science (Computer and Information engineering)en_US
dc.identifier.urihttps://studentrepo.iium.edu.my/handle/123456789/7276
dc.identifier.urlhttps://lib.iium.edu.my/mom/services/mom/document/getFile/2gz1wT91Of9PVW5vdnm6jjzzTyw70NKz20111115152056359
dc.language.isoenen_US
dc.publisherGombak : International Islamic University Malaysia, 2010en_US
dc.rightsCopyright International Islamic University Malaysia
dc.subject.lcshMetal oxide semiconductors, Complementaryen_US
dc.subject.lcshMetal oxide semiconductors, Complementary -- Design and constructionen_US
dc.subject.lcshIntegrated circuits -- Design and constructionen_US
dc.subject.lcshRadio frequency identification systemsen_US
dc.titleDesign of a 2.45 GHz RF-CMOS power splitter circuit for ISM RFID readersen_US
dc.typeMaster Thesisen_US
dspace.entity.typePublication

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