Publication:
A multi level inverter integrated with conditioning interface for grid-tied systems

dc.contributor.affiliation#PLACEHOLDER_PARENT_METADATA_VALUE#en_US
dc.contributor.authorShahid, Zeeshanen_US
dc.date.accessioned2024-10-07T03:01:17Z
dc.date.available2024-10-07T03:01:17Z
dc.date.issued2016
dc.description.abstractThis thesis presents the proposed design, working principle, simulation and experimental details of a transformer-less multilevel grid-tied inverter. Grid connectivity requires DC-to-AC inversion with efficient synchronization, reduced total harmonic distortion (THD), real-time control and monitoring. The generation of multi-level output can reduce harmonic with effective sinusoidal wave generation and increased efficiency; however, it requires more complex control and implementation. This research has applications in terms of integration of renewable energy sources with utility grids in stand-alone or industrial generation as well as in case of DG systems. This research proposes a six-level DC supply using novel switching technique with DC-DC converter, embedded with an element of adaptability choosing if Buck or Boost is required for addressing amplitude synchronization. Other issues with fly-back mitigation, low pass filter design for THD reduction and almost near to pure sine wave generation are addressed. The H-bridge transformer-less inverter is designed with four IGBTs (operated at 20kHz) synchronized pulse width modulation (PWM). Two additional fly-back IGBTs are introduced in H-bridge inverter to mitigate fly-back spike generation. For grid connectivity, a versatile technique of phase and frequency synchronization is proposed by using analog to digital converters (ADCs). The feedback and monitoring control scheme is proposed and tested for any abnormal occurrence on grid side. This enables continuous observation of the performance of inverters in terms of power sharing, synchronization and stability. Simulation results are validated experimentally; discussed and analyzed. The DC-DC supply under synchronized condition has a voltage variation range from 308V to 356V. In the proposed design, the IGBTs are reduced to active five. The maximum efficiency achieved is 99.3% (compared to 98.6% on the market) and the lowest is 98% under 1.8kW load. The use of six level generation (0V - 372V) has reduced THD to 2.4% following the EN-50160 and IEEE-1547 international standards.en_US
dc.description.callnumbert TK1001 S525M 2016en_US
dc.description.degreelevelDoctoralen_US
dc.description.identifierThesis : A multi level inverter integrated with conditioning interface for grid-tied systems /by Zeeshan Shahiden_US
dc.description.identityt11100344007ZeeshanShahiden_US
dc.description.kulliyahKulliyyah of Engineeringen_US
dc.description.notesThesis (Ph.D)--International Islamic University Malaysia, 2016en_US
dc.description.physicaldescriptionxxi, 196 leaves :ill. ;30cm.en_US
dc.description.programmeDoctor of Philosophy in Engineeringen_US
dc.identifier.urihttps://studentrepo.iium.edu.my/handle/123456789/2880
dc.identifier.urlhttps://lib.iium.edu.my/mom/services/mom/document/getFile/UBzxGmZe2G0gDEqQ1wm3JQYLfwRIggdh20160304114858618
dc.language.isoenen_US
dc.publisherKuala Lumpur : Kulliyyah of Engineering, International Islamic University Malaysia, 2016en_US
dc.rightsCopyright International Islamic University Malaysia
dc.subject.lcshElectronicsen_US
dc.subject.lcshElectric power systemsen_US
dc.titleA multi level inverter integrated with conditioning interface for grid-tied systemsen_US
dc.typeDoctoral Thesisen_US
dspace.entity.typePublication

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